Monday, February 06, 2006
Cadence Virtuoso Speeds Design and Verification of Sirific's 3.5G Cellular Transceivers
UltraSim Cuts Verification Time from Weeks to Hours
SAN JOSE, Calif. – February 6, 2006 – Cadence Design Systems, Inc. (NASDAQ: CDNS) today announced that Sirific Wireless Limited, a fabless RF semiconductor company, has successfully designed its single-chip CMOS RF transceiver for HSDPA / WEDGE using the Cadence Virtuoso® UltraSim Full-chip Simulator for FastSPICE simulation. The Virtuoso UltraSim simulator enabled Sirific to cut its verification time from two weeks to eight hours, allowing development in record time while ensuring silicon accuracy critical for mixed-signal designs.
Sirific designs and develops the NEXUS™ family of single-chip CMOS RF transceivers for 3.5G and 2.75G mobile applications. The Virtuoso UltraSim simulator helped Sirific improve its time to market by providing up to 40 times better performance than their previous methodology. The simulator addresses the need to verify all critical functional modes, using a single testbench to verify a mix of purely analog circuits where accuracy is needed and full digital circuits where the tolerance is relaxed.
“Virtuoso UltraSim proved to be the best tool for achieving the balance between simulation time and verification coverage," said Michael J. Hogan, president and CEO of Sirific Wireless. “Virtuoso UltraSim greatly improved the efficiency of our designers by providing them the best combination of performance, convergence and accuracy, giving us confidence in our design leading to first pass silicon success”
“Sirific’s adoption of Virtuoso UltraSim is a testimonial to our technology leadership in the simulation area,” said Zhihong Liu, corporate vice President of R&D for Virtuoso Multi-mode Simulation at Cadence. “Virtuoso UltraSim is our next-generation FastSPICE simulator that provides custom designers the ability to verify their complex mixed-signal SoCs with the silicon accuracy they need to quickly get their products to market.”
The Virtuoso UltraSim simulator is an integral part of Cadence Virtuoso Multi-mode Simulation, offering all the simulation components necessary for validating an IC or system. Virtuoso Muti-mode Simulation provides a unique combination of SPICE, FastSPICE, AMS and RF simulation in a flexible single multi-mode simulation licensing model that maximizes the value of a customer's investment. Virtuoso Multi-mode Simulation is a cornerstone of the Virtuoso custom design platform. All Virtuoso simulators—Virtuoso UltraSim Full-chip Simulator, Virtuoso AMS Designer Simulator, Virtuoso Spectre Circuit Simulator and Virtuoso Spectre RF Simulation Option—support common syntax and usage models, and share equations ensuring silicon-accurate results.
Cadence enables global electronic-design innovation and plays an essential role in the creation of today's integrated circuits and electronics. Customers use Cadence software and hardware, methodologies, and services to design and verify advanced semiconductors, consumer electronics, networking and telecommunications equipment, and computer systems. Cadence reported 2005 revenues of approximately $1.3 billion, and has approximately 5,000 employees. The company is headquartered in San Jose, Calif., with sales offices, design centers, and research facilities around the world to serve the global electronics industry. More information about the company, its products, and services is available at www.cadence.com
About Sirific Wireless Limited
Sirific Wireless Limited is a privately held fabless semiconductor company that designs and develops RF transceiver integrated circuits in CMOS for multi-mode mobile devices. Sirific is Advancing RF CMOS™ with a broad portfolio of single-chip CMOS RF products that exceed today’s industry standards to satisfy the requirements of tomorrow’s wireless applications. The company is headquartered in Richardson, Texas, with offices in the United States and Canada. For more information about Sirific Wireless visit www.sirific.com.