Company Logo Monday, June 06, 2011

Sidense First to Offer Antifuse OTP Supporting 1.8V IO in 40nm and 28nm Process Nodes

1T-OTP bit-cell proven with 1.8V IO oxide in 40nm and 28nm process nodes.

Ottawa, Canada - June 6, 2011 - Sidense Corp., a leading developer of Logic Non-Volatile Memory (LNVM) one-time programmable (OTP) memory cores, announced that it is the first IP provider to offer antifuse-based memory products supporting 1.8V IO at 40nm and 28nm process nodes.

Extending our OTP offering from 3.3V and 2.5V down to 1.8V IO, with a path to 1.5V, gives our customers much needed flexibility in optimizing the IO voltage for their applications. The higher speed and lower power of the 1.8V IO transistors, makes them more suitable for both high-performance and mobile applications. The 1.8V IO quickly becomes the preferred choice for 40nm node and below.

"Sidense's 1T-Fuse™ technology allows us to offer our customers what no one else has: secure and reliable 1T-OTP macros from 180nm to 28nm and below, using a proprietary bit-cell design now proven from 6V IO down to 1.8V IO," said Wlodek Kurjanowicz, Sidense Founder and CTO. "I’m confident the 1T-Fuse bit-cell will scale well to 1.5V and below at 28nm."
Sidense already has working OTP silicon at 28nm and will have OTP macros at this node available in 2012. Selected macros in various flavors of 40nm processes are available, with a full product line to be released in Q4 2011.

The Sidense solution enables a wide range of low-voltage applications including code-storage, secure key storage and device IDs for devices such as HDTV media processors, DDR2 interfaces, high-speed communications devices and network processors, just to name a few.

About Sidense Corp.

Sidense Corp. provides secure, very dense and reliable non-volatile, one-time programmable (OTP) memory IP for use in standard-logic CMOS processes with no additional masks or process steps required and no impact on product yield. The Company’s innovative one-transistor 1T-Fuse™ architecture provides the industry’s smallest footprint, most reliable and lowest power Logic Non-Volatile Memory (NVM) IP solution. With over 70 patents granted or pending, Sidense OTP provides a field-programmable alternative solution to Flash, mask ROM and eFuse in many OTP and MTP applications.

Sidense SiPROM, SLP and ULP memory products, embedded in over 160 customer designs, are available from 180nm down to 40nm and are scalable to 28nm and below. The IP is offered at and has been adopted by all top-tier semiconductor foundries and selected IDMs. Customers are using Sidense OTP for analog trimming, code storage, encryption keys such as HDCP, WHDI, RFID and Chip ID, medical, automotive, and configurable processors and logic.   For more information, please visit www.sidense.com.

Media Contacts

CAIN COMMUNICATIONS FOR SIDENSE
Susan Cain
503-538-2747
scain@caincom.com

SIDENSE
Jim Lipman
925-616-1370
jim@sidense.com


 

linkback: http://www.sidense.com/Press-Releases/2011/Sidense-First-to-Offer-Antifuse-OTP-Supporting-1.8V-IO-in-40nm-and-28nm-Process-Nodes.html

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