Tuesday, May 13, 2008
Sidense SLP Memory IP Targets Low Power OTP Applications
Ottawa, Canada - May 13th, 2008 - Sidense, a leading developer of Logic Non-Volatile Memory (LNVM) IP cores, today announced the Sidense Low Power (SLP) one-time programmable (OTP) memory macrocells for low-power and cost-sensitive applications that require highly secure information storage.
“With Sidense’s 1T-OTP SLP memory IP, our customers have a highly secure, very low-power embedded storage solution that offers low active and standby power and read access times below 50ns, ideal for power-sensitive devices,” said Jim Lipman, Sidense’s director of marketing. “In addition, SLP macros feature very small footprints, thus making them attractive for high-density storage applications.”
Additional SLP Features
SLP macros feature two additional read modes with enhanced margins and data security for highly reliable, field-programmable systems – differential and redundant read modes. Differential read mode, available in a dual-array configuration only, compares two memory cells, one programmed and one un-programmed, without needing a reference. This provides faster read access times and improved voltage and temperature ranges, ideal for automotive applications. In redundant read mode, two memory cells that are programmed the same are accessed in parallel and compared to a reference voltage, doubling the array’s signal margin.
Designers have an optional, configurable IPS (integrated power supply) macro available that can include a charge pump for field-programming SLP memory bits. The IPS macro can also supply the read reference voltage needed for non-differential read operations, eliminating the need for extra circuitry to supply a read reference voltage.
Sidense OTP memory is available at 180nm, 130nm, 90nm and 65nm and scalable to 45nm and below. The IP is available at UMC, TSMC, SMIC, Tower and Chartered. Customers are using Sidense OTP for analog trimming, code storage, encryption keys such as HDCP, RFID and Chip ID, medical, automotive, and configurable processors and logic. For more information, visit www.sidense.com